About Bitdeer:
Bitdeer is a world-leading technology company for Bitcoin mining and AI cloud.
Bitdeer is committed to providing comprehensive Bitcoin mining solutions for its customers. Apart from designing industry-leading ASIC chips and manufacturing mining rigs, the Group handles complex processes involved in computing across the value chain. This includes equipment procurement, transport logistics, datacenter design and construction, equipment management, and network and facility operations. Bitdeer also offers advanced cloud capabilities to customers with a high demand for artificial intelligence.
Headquartered in Singapore, Bitdeer operates globally with a diversified 3 GW energy portfolio, and deploys Bitcoin mining and HPC datacenters in the United States, Bhutan, Norway, Canada, Malaysia, and Ethiopia.
Job Summary:
We are seeking a Staff / Principal Advanced Packaging Engineer to lead packaging architecture, technology strategy, and high-volume manufacturing execution for next-generation HPC and AI silicon.
This is a high-impact, hands-on technical leadership role responsible for driving advanced packaging from concept through mass production. You will define the company’s packaging roadmap, lead cross-functional chip-package-board co-design, and ensure scalable, reliable production for large-die, high-power devices.
What you will be responsible for:
1. Packaging Architecture & Technology Strategy
- Serve as the company’s technical authority on advanced semiconductor packaging.
- Define packaging architecture and select optimal technologies for high-performance, high-power HPC/AI silicon.
- Evaluate and deliver the best PPAC (Performance, Power, Area, Cost) trade-offs across solutions such as high-layer-count FCBGA, 3D stacking architectures, etc.
- Lead system-level Chip–Package–Board co-design in close collaboration with silicon and hardware teams.
2. Technical Governance & Outsourcing Management
- Own technical engagement with internal teams, and external packaging design houses.
- Establish clear design rules, review processes, delivery schedule, and quality standards.
- Perform independent technical sign-off on substrate layout, DRC / DFM compliance, critical design reviews to ensure design goals are met
- Partner with substrate suppliers to align process capabilities and technology roadmaps, assess mass-production feasibility and mitigate technical and schedule risks
3. SI/PI, Thermal & Mechanical Excellence
- Lead package-level Signal Integrity (SI) and Power Integrity (PI) reviews for high-speed interfaces (PCIe, SerDes, HBM/3D DRAM, etc.).
- Review and validate electromagnetic simulation results to ensure compliance with aggressive electrical targets.
- Drive thermal architecture and mechanical reliability strategy for high-power and 3D stacked devices.
- Oversee warpage, stress, and reliability modeling (e.g., Ansys, Flotherm) to prevent substrate warpage, die cracking, long-term reliability risks
4. NPI, Supply Chain & Mass Production Leadership
- Lead packaging execution through New Product Introduction (NPI) into high-volume manufacturing and resolve technical issues due to issues within the process flow from bumping to molding
- Own resolution of mass production challenges, including yield excursions, solder voids, bonding failures
- Define reliability qualification strategy and lead failure analysis (FA) to drive rapid root-cause resolution.
How you will stand out:
- Bachelor’s degree or above in Microelectronics, Semiconductor Engineering, Electronic & Electrical Engineering, or related fields.
- >8 years in advanced semiconductor packaging (architecture, design, or process).
- Proven experience bringing large-area, high-power SoC/GPU/NPU devices from concept to high-volume production.
- Strong hands-on experience with high-layer-count FCBGA (3D stacking experience highly preferred).
- Expert-level substrate layout review capability (Cadence APD / Allegro).
- Deep knowledge of SI/PI analysis for large, high-speed dies; able to interpret electromagnetic simulation results.
- Good understanding of thermal effects on and mechanical impact of large-die packaging and has experience managing warpage mitigation and stress control.
- Good understanding of JEDEC reliability standards and FA techniques (SAT, X-ray, FIB, SEM).
- Demonstrate excellent communication skills with strong ability to collaborate across teams
- Proven ability to manage and influence external vendors with technical authority.
- Self-driven, accountable, and capable of leading complex programs end-to-end in dependently.
What you will experience working with us:
- A culture that values authenticity and diversity of thoughts and backgrounds;
- An inclusive and respectable environment with open workspaces and exciting start-up spirit;
- Fast-growing company with the chance to network with industrial pioneers and enthusiasts;
- Ability to contribute directly and make an impact on the future of the digital asset industry;
- Involvement in new projects, developing processes/systems;
- Personal accountability, autonomy, fast growth, and learning opportunities;
- Attractive welfare benefits and developmental opportunities such as training and mentoring.